Description
Features
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC
Standard No. 7A
• ESD Performance: HBM 2000 V; Machine Model 200 V
• Chip Complexity: 328 FETs or 82 Equivalent Gates
• Improvements over HC595
− Improved Propagation Delays
− 50% Lower Quiescent Power
− Improved Input Noise
Data sheet – https://www.onsemi.com/pub/Collateral/MC74HC595-D.PDF
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